The present invention is directed to fuse circuits included within semiconductor devices. More particularly, the present invention is directed to a fuse circuit utilizing high voltage transistors operable with high fuse programming voltage for optimal fuse programming yield.
Most semiconductor integrated circuit (xe2x80x9cICxe2x80x9d) devices now in use are generally fabricated in what is called CMOS (Complementary Metal Oxide Semiconductor) technology, which forms both PMOS and NMOS transistors in a silicon substrate. The objective of IC technology is to minimize transistor size and increase the density of core transistors in IC devices.
Examples of semiconductor IC devices include programmable read-only memory (PROM) devices, programmable logic arrays (PLA), and other types of memory arrays, such as dynamic random access memory (DRAM), static random access memory (SRAM), video random access memory (VRAM) and erasable programmable read-only memory (EPROM). These IC devices are typically designed with a number of redundant component elements that may be used to replace defective components in order to provide a fully functional circuit. These redundant components may be individual memory rows, memory columns or even individual memory cells in a particular row and column. In addition, one or more fuses may be used, in conjunction with other circuit elements, to control various circuit parameters (i.e. a digital value, a voltage, a current etc.). In general, a fuse operates in one of two states (programmed or un-programmed), namely a xe2x80x9cclosedxe2x80x9d (i.e. low resistance) state, and an xe2x80x9copenxe2x80x9d (i.e. high resistance) state, in order to isolate the defective component and to selectively connect the redundant component in place of the defective component. In addition, such fuses may also be used to store process information of the IC devices (i.e., chip identification) for subsequent use to identify the IC devices.
A variety of fuses have been used in IC devices. For example, one fuse structure is formed by the so-called xe2x80x9cZener zapxe2x80x9d method. Another example fuse structure is a metal link formed of tungsten. However, metal link fuses require large programming currents and are not viable for use with IC devices formed using newer process technologies.
A more recent fuse structure is the poly fuse (xe2x80x9cpolysiliconxe2x80x9d or xe2x80x9cpoly resistorxe2x80x9d fuse). One advantage of the poly fuse over the metal link fuse is the lesser amount of current required to open the fuse element during programming. Typical poly fuses in a fuse array exhibit a pre-burned resistance of 30-100 ohms and a post-burned resistance ranging from a few hundreds to thousands ohms. In order to burn (or blow) the poly fuses in a fuse cell effectively, a relatively high fuse programming voltage is required. Under the current practice, however, the highest fuse programming voltage applied to poly fuses in a fuse array is limited to the common chip core burn-in voltage (Vcc) to insure reliability. Unfortunately, the common chip core burn-in voltage (Vcc) is not sufficient to program the fuses in the fuse array effectively. As a result, the fuse programming failure rate in a fuse array is high and, likewise, the fuse programming yield remains unacceptably low.
Therefore, a need exists for a new fuse circuit for implementation within IC devices formed using standard CMOS processes which utilizes high voltage transistors configured to operate with high fuse programming voltage for optimal fuse programming yield.